Wirepas SDK
spi.h
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/* Copyright 2018 Wirepas Ltd. All Rights Reserved.
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*
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* See file LICENSE.txt for full license details.
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*
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*/
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#ifndef SPI_H_
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#define SPI_H_
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#include <stdbool.h>
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#include <stdint.h>
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typedef
enum
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{
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SPI_MODE_LOW_FIRST
,
//< Low Polarity, First Clock edge
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SPI_MODE_LOW_SECOND
,
//< Low Polarity, Second Clock edge
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SPI_MODE_HIGH_FIRST
,
//< High Polarity, First Clock edge
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SPI_MODE_HIGH_SECOND
//< High Polarity, Second Clock edge
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}
spi_mode_e
;
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typedef
enum
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{
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SPI_ORDER_MSB
,
//< Most Significant Bit first
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SPI_ORDER_LSB
//< Less Significant Bit first
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}
spi_bit_order_e
;
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typedef
struct
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{
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uint32_t
clock
;
//< SPI speed in Hz
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spi_mode_e
mode
;
//< SPI mode of operation
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spi_bit_order_e
bit_order
;
//< SPI bit order
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}
spi_conf_t
;
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typedef
struct
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{
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uint8_t *
write_ptr
;
//< Pointer to bytes to write (Must be NULL for pure read)
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size_t
write_size
;
//< Number of bytes to write (Must be 0 for pure read)
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uint8_t *
read_ptr
;
//< Pointer to store bytes to read (Must be NULL for pure write)
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size_t
read_size
;
//< Number of bytes to read (Must be 0 for pure write)
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uint32_t
custom
;
//< Custom param (can be used to implement state machine)
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}
spi_xfer_t
;
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typedef
enum
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{
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SPI_RES_OK
,
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SPI_RES_INVALID_CONFIG
,
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SPI_RES_INVALID_XFER
,
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SPI_RES_NOT_INITIALIZED
,
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SPI_RES_ALREADY_INITIALIZED
,
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SPI_RES_BUSY
,
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SPI_RES_BLOCKING_NOT_AVAILABLE
,
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SPI_RES_ONLY_BLOCKING_AVAILABLE
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}
spi_res_e
;
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typedef
void (*
spi_on_transfer_done_cb_f
)(
spi_res_e
res,
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spi_xfer_t
* xfer_p);
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spi_res_e
SPI_init
(
spi_conf_t
* conf_p);
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spi_res_e
SPI_close
();
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spi_res_e
SPI_transfer
(
spi_xfer_t
* xfer_p,
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spi_on_transfer_done_cb_f
cb);
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#endif
/* SPI_H_ */
SPI_MODE_LOW_SECOND
@ SPI_MODE_LOW_SECOND
Definition:
spi.h:21
spi_mode_e
spi_mode_e
Simple minimal SPI master driver It only manages one SPI instance at a time.
Definition:
spi.h:18
spi_xfer_t::read_ptr
uint8_t * read_ptr
Definition:
spi.h:46
SPI_ORDER_MSB
@ SPI_ORDER_MSB
Definition:
spi.h:29
SPI_RES_BUSY
@ SPI_RES_BUSY
Definition:
spi.h:59
SPI_MODE_HIGH_FIRST
@ SPI_MODE_HIGH_FIRST
Definition:
spi.h:22
spi_conf_t::mode
spi_mode_e mode
Definition:
spi.h:37
SPI_RES_OK
@ SPI_RES_OK
Definition:
spi.h:54
SPI_close
spi_res_e SPI_close()
Close an already initialized SPI module.
SPI_RES_ALREADY_INITIALIZED
@ SPI_RES_ALREADY_INITIALIZED
Definition:
spi.h:58
spi_conf_t
Definition:
spi.h:34
spi_conf_t::bit_order
spi_bit_order_e bit_order
Definition:
spi.h:38
SPI_RES_ONLY_BLOCKING_AVAILABLE
@ SPI_RES_ONLY_BLOCKING_AVAILABLE
Definition:
spi.h:61
spi_on_transfer_done_cb_f
void(* spi_on_transfer_done_cb_f)(spi_res_e res, spi_xfer_t *xfer_p)
Definition:
spi.h:65
SPI_RES_INVALID_CONFIG
@ SPI_RES_INVALID_CONFIG
Definition:
spi.h:55
spi_bit_order_e
spi_bit_order_e
Definition:
spi.h:27
spi_xfer_t::custom
uint32_t custom
Definition:
spi.h:48
SPI_init
spi_res_e SPI_init(spi_conf_t *conf_p)
Initialize SPI module.
spi_conf_t::clock
uint32_t clock
Definition:
spi.h:36
spi_xfer_t::write_ptr
uint8_t * write_ptr
Definition:
spi.h:44
SPI_MODE_LOW_FIRST
@ SPI_MODE_LOW_FIRST
Definition:
spi.h:20
spi_res_e
spi_res_e
Definition:
spi.h:52
SPI_RES_INVALID_XFER
@ SPI_RES_INVALID_XFER
Definition:
spi.h:56
SPI_RES_NOT_INITIALIZED
@ SPI_RES_NOT_INITIALIZED
Definition:
spi.h:57
SPI_ORDER_LSB
@ SPI_ORDER_LSB
Definition:
spi.h:30
spi_xfer_t
Definition:
spi.h:42
spi_xfer_t::write_size
size_t write_size
Definition:
spi.h:45
SPI_RES_BLOCKING_NOT_AVAILABLE
@ SPI_RES_BLOCKING_NOT_AVAILABLE
Definition:
spi.h:60
SPI_MODE_HIGH_SECOND
@ SPI_MODE_HIGH_SECOND
Definition:
spi.h:23
SPI_transfer
spi_res_e SPI_transfer(spi_xfer_t *xfer_p, spi_on_transfer_done_cb_f cb)
Enable or disable USART.
spi_xfer_t::read_size
size_t read_size
Definition:
spi.h:47